cache.h File Reference

Cache subsystem. More...

#include <gctypes.h>

Defines

#define LC_BASEPREFIX   0xe000
#define LC_BASE   (LC_BASEPREFIX<<16)
#define LCGetBase()   ((void*)LC_BASE)

Functions

void DCEnable ()
 Enable L1 d-cache.
void DCDisable ()
 Disable L1 d-cache.
void DCFreeze ()
 Current contents of the L1 d-cache are locked down and will not be cast out.
void DCUnfreeze ()
 Undoes actions of DCFreeze().
void DCFlashInvalidate ()
 Invalidate L1 d-cache.
void DCInvalidateRange (void *startaddress, u32 len)
 Invalidates a given range of the d-cache.
void DCFlushRange (void *startaddress, u32 len)
 Flushes a given range.
void DCStoreRange (void *startaddress, u32 len)
 Ensures a range of memory is updated with any modified data in the cache.
void DCFlushRangeNoSync (void *startaddress, u32 len)
 Flushes a given range.
void DCStoreRangeNoSync (void *startaddress, u32 len)
 Ensures a range of memory is updated with any modified data in the cache.
void DCZeroRange (void *startaddress, u32 len)
 Loads a range of memory into cache and zeroes all the cache lines.
void DCTouchRange (void *startaddress, u32 len)
 Loads a range of memory into cache.
void ICSync ()
 Performs an instruction cache synchronization.
void ICFlashInvalidate ()
 Invalidate the L1 i-cache.
void ICEnable ()
 Enable L1 i-cache.
void ICDisable ()
 Disable L1 i-cache.
void ICFreeze ()
 Current contents of the L1 i-cache are locked down and will not be cast out.
void ICUnfreeze ()
 Undoes actions of ICFreeze().
void ICBlockInvalidate (void *startaddress)
 Invalidates a block in the i-cache.
void ICInvalidateRange (void *startaddress, u32 len)
 Invalidate a range in the L1 i-cache.
void LCEnable ()
void LCDisable ()
void LCLoadBlocks (void *, void *, u32)
void LCStoreBlocks (void *, void *, u32)
u32 LCLoadData (void *, void *, u32)
u32 LCStoreData (void *, void *, u32)
u32 LCQueueLength ()
u32 LCQueueWait (u32)
void LCFlushQueue ()
void LCAlloc (void *, u32)
void LCAllocNoInvalidate (void *, u32)
void LCAllocOneTag (BOOL, void *)
void LCAllocTags (BOOL, void *, u32)


Detailed Description

Cache subsystem.


Function Documentation

void DCDisable (  ) 

Disable L1 d-cache.

Returns:
none

void DCEnable (  ) 

Enable L1 d-cache.

Returns:
none

void DCFlashInvalidate (  ) 

Invalidate L1 d-cache.

An invalidate operation is issued that marks the state of each data cache block as invalid without writing back modified cache blocks to memory.
Cache access is blocked during this time.Bus accesses to the cache are signaled as a miss during invalidate-all operations.

Returns:
none

void DCFlushRange ( void *  startaddress,
u32  len 
)

Flushes a given range.

If any part of the range hits in the d-cache the corresponding block will be flushed to main memory and invalidated.
NOTE: This function invokes a "sync" after flushing the range. This means the function will stall until the CPU knows that the data has been writen to main memory

Parameters:
[in] startaddress pointer to the startaddress of the memory range to flush. NOTE: Has to be aligned on a 32byte boundery
[in] len length of range to be flushed. NOTE: Should be a multiple of 32
Returns:
none

void DCFlushRangeNoSync ( void *  startaddress,
u32  len 
)

Flushes a given range.

If any part of the range hits in the d-cache the corresponding block will be flushed to main memory and invalidated.
NOTE: This routine does not perform a "sync" to ensure that the range has been flushed to memory. That is, the cache blocks are sent to the bus interface unit for storage to main memory, but by the time this function returns, you are not guaranteed that the blocks have been written to memory.

Parameters:
[in] startaddress pointer to the startaddress of the memory range to flush. NOTE: Has to be aligned on a 32byte boundery
[in] len length of range to be flushed. NOTE: Should be a multiple of 32
Returns:
none

void DCFreeze (  ) 

Current contents of the L1 d-cache are locked down and will not be cast out.

Hits are still serviced, but misses go straight to L2 or 60x bus. Most cache operations, such as DCFlushRange(), will still execute regardless of whether the cache is frozen.
NOTE: In PowerPC architecture jargon, this feature is referred to as "locking" the data cache. We use the word "freeze" to distinguish it from the locked cache and DMA features.

Returns:
none

void DCInvalidateRange ( void *  startaddress,
u32  len 
)

Invalidates a given range of the d-cache.

If any part of the range hits in the d-cache, the corresponding block will be invalidated.

Parameters:
[in] startaddress pointer to the startaddress of the memory range to invalidate. NOTE: Has to be aligned on a 32byte boundery
[in] len length of the range to invalidate. NOTE: Should be a multiple of 32
Returns:
none

void DCStoreRange ( void *  startaddress,
u32  len 
)

Ensures a range of memory is updated with any modified data in the cache.

NOTE: This function invokes a "sync" after storing the range. This means the function will stall until the CPU knows that the data has been writen to main memory

Parameters:
[in] startaddress pointer to the startaddress of the memory range to store. NOTE: Has to be aligned on a 32byte boundery
[in] len length of the range to store. NOTE: Should be a multiple of 32
Returns:
none

void DCStoreRangeNoSync ( void *  startaddress,
u32  len 
)

Ensures a range of memory is updated with any modified data in the cache.

NOTE: This routine does not perform a "sync" to ensure that the range has been flushed to memory. That is, the cache blocks are sent to the bus interface unit for storage to main memory, but by the time this function returns, you are not guaranteed that the blocks have been written to memory

Parameters:
[in] startaddress pointer to the startaddress of the memory range to store. NOTE: Has to be aligned on a 32byte boundery
[in] len length of the range to store. NOTE: Should be a multiple of 32
Returns:
none

void DCTouchRange ( void *  startaddress,
u32  len 
)

Loads a range of memory into cache.

Parameters:
[in] startaddress pointer to the startaddress of the memory range to load. NOTE: Has to be aligned on a 32byte boundery
[in] len length of the range to load. NOTE: Should be a multiple of 32
Returns:
none

void DCUnfreeze (  ) 

Undoes actions of DCFreeze().

Old cache blocks will now be cast out on subsequent L1 misses.
NOTE: In PowerPC architecture jargon, this feature is referred to as "locking" the data cache. We use the word "freeze" to distinguish it from the locked cache and DMA features.

Returns:
none

void DCZeroRange ( void *  startaddress,
u32  len 
)

Loads a range of memory into cache and zeroes all the cache lines.

Parameters:
[in] startaddress pointer to the startaddress of the memory range to load/zero. NOTE: Has to be aligned on a 32byte boundery
[in] len length of the range to load/zero. NOTE: Should be a multiple of 32
Returns:
none

void ICBlockInvalidate ( void *  startaddress  ) 

Invalidates a block in the i-cache.

If the block hits in the i-cache, the corresponding block will be invalidated.

Parameters:
[in] startaddress pointer to the startaddress of the memory block to invalidate. NOTE: Has to be aligned on a 32byte boundery
Returns:
none

void ICDisable (  ) 

Disable L1 i-cache.

Returns:
none

void ICEnable (  ) 

Enable L1 i-cache.

Returns:
none

void ICFlashInvalidate (  ) 

Invalidate the L1 i-cache.

An invalidate operation is issued that marks the state of each instruction cache block as invalid without writing back modified cache blocks to memory.
Cache access is blocked during this time. Bus accesses to the cache are signaled as a miss during invalidate-all operations.

Returns:
none

void ICFreeze (  ) 

Current contents of the L1 i-cache are locked down and will not be cast out.

Hits are still serviced, but misses go straight to L2 or 60x bus.
NOTE: In PowerPC architecture jargon, this feature is referred to as "locking" the data cache. We use the word "freeze" to distinguish it from the locked cache and DMA features.

Returns:
none

void ICInvalidateRange ( void *  startaddress,
u32  len 
)

Invalidate a range in the L1 i-cache.

If any part of the range hits in the i-cache, the corresponding block will be invalidated.

Parameters:
[in] startaddress pointer to the startaddress of the memory range to invalidate. NOTE: Has to be aligned on a 32byte boundery
[in] len length of the range to invalidate. NOTE: Should be a multiple of 32
Returns:
none

void ICSync (  ) 

Performs an instruction cache synchronization.

This ensures that all instructions preceding this instruction have completed before this instruction completes.

Returns:
none

void ICUnfreeze (  ) 

Undoes actions of ICFreeze().

Old cache blocks will now be cast out on subsequent L1 misses.
NOTE: In PowerPC architecture jargon, this feature is referred to as "locking" the data cache. We use the word "freeze" to distinguish it from the locked cache and DMA features.

Returns:
none


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